Short CV

Jos Huisken is a researcher in the domain of energy efficient VLSI design. After graduation from the University of Twente he joined Philips Research to design their first digital signal processor in CMOS. He has been involved in automated architectural synthesis for digital signal processors, and applied these techniques for initial Digital Audio Broadcast (ETSI-DAB) ICs in the 1990s. Since then he has been driving low power VLSI-design from an architectural point of view.
After investigating turbo- and LDPC-decoders, and being involved in creating a spinoff company Silicon Hive from Philips (now Intel) on digital signal processing and compilation, he joined Holst Centre/imec in 2008 to work on ultra-low power DSP for wireless sensor nodes for body area networks, with a strong focus on low-voltage and low-power circuit design. Joining RWTH Aachen in 2013 his research shifted to reliable VLSI design and Design for Error Resilience (DfER). January 2017 he joined TU/e to give courses on VLSI circuit design, carry out research in the field of VLSI design for EEG signal processing, ultrasound and baseband processing and to continue his research in Design for Error Resilience.

Since January 2023 not employed anymore and enjoy life in a different way, taking up (new and old) hobbies and doing some research.

You can find more information about me on:

• TU/e, old- home page, group EE/ES
• LinkedIn
• Orcid
• Google Scholar citations
• ResearchGate
• Facebook